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A CHARON-AXP emulated CPU is configured with the "enabled" command enabling the high performance Advanced CPU Emulation mode ("ACE"). The ACE option optimizes the HP Alpha instruction interpretation and significantly improves performance. It also requires approximately twice the amount of host memory allocated by CHARON instance itself to store the optimized code (Note that 2Gb of host memory + the amount of HP Alpha memory emulated per each CHARON instance is required).

ACE optimization is performed dynamically during execution. It does not need to write optimized code back to disk, ACE provides its full capability instantly. The optimization does not compromise the HP Alpha instruction decoding; CHARON-AXP remains fully HP Alpha hardware compatible and completely transparent to the HP Alpha operating systems and applications.

This configuration setting enables the ACE mode if the CHARON-AXP license permits it. If this configuration setting is omitted from the CHARON-AXP configuration file and the license permits it, "true" is the default, otherwise "false" is the default.

Example:

The ACE mode is disabled when the host system does not meet the minimum physical requirements for this operation. If the emulator appears not to run at its normal performance, check the log file for a change in the ACE mode and verify that sufficient host resources, especially memory, are available.

cpu_architecture

Text String

Specifies the architecture of the virtual Alpha CPU. Can be one of the following: EV4, EV45, EV5, EV56, EV6, EV67, EV68

Example:

Refer to this section to find an appropriate value of the HP Alpha architecture per each HP Alpha model supported by CHARON-AXP.

cache_size

"cache_size" defines the amount of memory in megabytes allocated to the ACE cache.

The default value of the cache_size set to 1GB (1024 MB).

Example: